Core Name Explanation Table
Before I start going on about all those different code names, I’d like to give you some help with this
Core Name | Processor Name | Explanation | Die-Technology |
Klamath | Pentium II 233 – 300 | Pentium II core | .35µ |
Deschutes | Pentium II 300 – 450, Celeron 266, 300 Mobile Pentium II 233 – 300 | Pentium II core | .25µ |
Mendocino | Celeron 300A – 500, Mobile Celeron 266 – 400 |
Pentium II core + 128 kB on-die L2 cache |
.25µ |
Dixon | Mobile Pentium II 266 PE – 400 | Pentium II core + 256 kB on-die L2 cache |
.25µ, partly .18µ |
Katmai | Pentium III 500 – 600 | Pentium II core + Streaming SIMD Extensions |
.25µ |
Coppermine | Pentium III 550 – 800 | Pentium II core + Streaming SIMD Extensions + 256 kB on-die L2-cache |
.18µ |
Coppermine-128 | Celeron 550 – … | Pentium II core + Streaming SIMD Extensions + 128 kB on-die L2-cache |
.18µ |
Slot1
Slot1 is a dying processor platform, because the clumsy cartridge won’t be needed anymore once Katmai and Deschutes are gone. It’s hard to believe, but you’ll soon find the faster CPUs on Socket370.
It seems as if Pentium II as well as Celeron will be discontinued for Slot1 by the end of this year.
Willamette:
It is not quite correct including Willamette into the above Slot1-chart, because it will run on a completely new platform, but it will be the successor of Pentium III and thus it fits quite well here. This processor will represent the next architecture (P7) for IA32, Intel’s 32-bit processor line. The transition from P6 to P7 will most likely be like the transition form Pentium to Pentium II or from the 486 to Pentium. We don’t know much about this CPU yet, except that it is supposed to be manufactured in .13µ-technology and that the architecture will be significantly superior to P6 (Pentium Pro, Pentium II, Pentium III). Willamette’s `server-brother’ will be `Foster’, but it’s not yet clear if the structure of Foster will be as close to Willamette as the structure of `Cascades’ is to `Coppermine’.
Pentium III (Coppermine):
This upcoming processor will use a Pentium III core such as the currently shipping Pentium III with ‘Katmai’-core, but Coppermine will include 256 kB of 2nd level cache on-die. Thus this CPU doesn’t really require the cartridge packaging anymore, because it doesn’t require any external components such as the current Pentium III or Pentium II, which both use external L2-cache modules. Coppermine will run its smaller L2-cache at core clock speed, whilst the current PIII (Katmai) and the PII run the L2-cache only at 1/2 the core clock speed. I expect that Coppermine’s performance will be superior to the performance of Katmai, just as the performance of `Dixon’ (aka `Mobile Pentium II (PE) = Coppermine minus SSE) turned out to be superior to Deschutes (Mobile Pentium II) in the notebook sector. Coppermine will be released in versions for 100 MHz as well as 133 MHz front side bus and it’s manufactured in .18µ-technology.
Pentium III (Katmai):
When Intel released Pentium III a few months ago, they introduced it in form of the .25µ-Katmai-core. This core does not include any second-level cache on-die, which is why it only comes as Slot1-solution, to host the external L2-cache chips we already know from Pentium II. Katmai will not disappear right after the release of Coppermine, all upcoming Pentium III processors at speeds of up to 600/100 MHz will use the Katmai-core for the time being. It’s important to bear in mind that Katmai will most likely be some 5-10% slower than Coppermine at the same clock speed, which is why Intel delays the release of Coppermine for Socket370. If Intel wouldn’t do that, a Socket370-Pentium III 550 would be faster than a Slot1-Pentium III 550 due to the different cores. That would turn Intel’s world around as you can imagine.
Socket 370
Socket370 has got a bright future ahead of it, as you can see in the following overview. The days of Slot1 are counted and why wouldn’t we all love to embrace Socket370 as our basic platform? It offers a much better price point and the same or soon even better performance.
Again I included Willamette here too, although it will most likely use neither Slot1 nor Socket370, but it will be found in the same consumer space as where we find PIII and Celeron right now.
Pentium III (Coppermine) for Socket370:
As already mentioned in the highlights-section, with Coppermine, Pentium III can go `back’ into the socket-package and it will. The only difference to the already known Socket370-package of Celeron will be that Coppermine will come in a `flip-chip’-package. This package is many of you already known from Pentium III, it simply says that the chip-silicon is not covered by any metal-cover, but the heat sink gets attached directly to the `backside’ of the very silicon, to offer a better heat dissipation.
This is what a `flip-chip’ looks like.
As you can see from above roadmap, the launch of Coppermine for Socket370 will be delayed. Intel will start releasing Pentium III 550/100 and 600/100 some 6 weeks after the Coppermine launch for Slot1. You’ll have to wait even longer for the official launch of Coppermine Socket370-CPUs for 133 MHz FSB. This makes me wonder what `810e’ is supposed to be for. Intel seems honestly to believe that people will plug their beautiful and expensive new Slot1-Coppermine-PIII into an 810e-platform? I wonder how much of intoxication it will take to make customers believe in that funny combination.
Celeron (Coppermine-128):
I guess you are a little bit confused to find the name `Coppermine’ even in combination with the name `Celeron’. Well, the explanation is pretty simple. Since we’ve just learned that Intel’s `Streaming SIMD Extensions’ are `indispensable’ already now (which I didn’t know so far), Intel thinks that the poor Celeron-user deserves his portion of SSE as well. Now we know that the current Celerons using the `Mendocino’-core are a Pentium II core plus 128kB on-die L2-cache. Coppermine is Pentium II core plus SSE plus 256 kB on-die L2-cache. The logical consequence would be that the new Celeron with SSE enhancement is nothing than Pentium II core plus SSE plus 128 kB on-die L2-cache. This is equal to a Coppermine-core minus 128 kB L2-cache and there we are, Intel calls that `Coppermine-128′. You may be surprised why we have to wait until Q2 next year until Intel will bless us with a SSE-enhanced Celeron. The roadmap has the following answer: “Strong yields of Mendocino have pushed Coppermine-128 later into Q1’00” – I guess it’s too bad for us poor customers that `strong yields have pushed’, otherwise Celeron would have received the SSE-intoxication-blessings earlier.
Tomorrow you’ll get the Desktop Chipset Roadmap, with some more sharp, but `indispensable’ comments from me and the Mobile CPU Roadmap, followed by the Server CPU and Chipset Roadmap as well as the pricing. See ya then!